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| Memory ICs BR9080 / BR9080F / BR9080RFV / BR9016 / BR9016F / BR9016RFV 8k, 16k bit EEPROMs for direct connection to serial ports BR9080 / BR9080F / BR9080RFV / BR9016 / BR9016F / BR9016RFV The BR9080 and BR9016 series are serial EEPROMs that can be connected directly to a serial port and can be erased and written electrically. Writing and reading is performed in word units, using four types of operation commands. Communication occurs though CS, SK, DI, and DO pins, WC pin control is used to initiate a write disabled state, enabling these EEPROMs to be used as one-time ROMs. During writing, operation is checked via the internal status check. Applications Movie, camera, cordless telephones, car stereos, VCRs, TVs, DIP switches, and other battery-powered equipment requiring low voltage and low current Features 1) BR9080 / F / RFV (8k bit): 512 words x16 bits BR9016 / F / RFV (16k bit): 1024 words x 16bits 2) Single power supply operation 3) Serial data input and output 4) Automatic erase-before-write 5) Low current consumption Active (5V) : 5mA (max.) Standby (5V) : 3A (max.) 6) Noise filter built into SK pin 7) Write protection when VCC is low 8) Compact DIP8 / SOP8 / SSOP-B8 packages 9) High reliability CMOS process 10) 100,000 ERASE / WRITE cycles 11) 10 years Data Retention Block diagram INSTRUCTION DECODE R/B CS CONTROL CLOCK GENERATION DETECT SUPPLY VOLTAGE WRITE DISABLE HIGH VOLTAGE GENERATOR SK WC DI INSTRACTION REGISTER ADD BUFFER 9bit ADD DECORDER 9bit 8,192 bit EEPROM DO DATA REGISTER 16bit R/W AMPS 16bit Memory ICs Pin descriptions VCC R/B WC GND WC BR9080 / BR9080F / BR9080RFV / BR9016 / BR9016F / BR9016RFV GND DO DI VCC R / B WC GND CS SK DI DO R/B VCC CS SK CS SK DI DO BR9016 : DIP8 BR9016F : SOP8 Fig.1 BR9016RFV : SSOP8 Pin No. DIP / SSOP 1 2 3 4 5 6 7 8 SOP 3 4 5 6 7 8 1 2 Pin name CS SK DI DO GND WC R/B VCC Chip Select Control Serial Data Clock Input Function Op code, address, Serial Data Input Serial Data Output Ground 0V Write Control Input READY / BUSY Output Power supply Absolute maximum ratings (Ta=25C) Parameter Supply voltage Symbol VCC DIP8 Power dissipation Pd SOP8 SSOP-B8 Storage temperature Operation temperature Input voltage Tstg Topr - -40+85 -0.3VCC+0.3 Limits -0.3+7.0 5001 3502 3003 C C V mW Unit V -65+125 1 Reduced by 5.0mW for each increase in Ta of 1C over 25C. 2 Reduced by 3.5mW for each increase in Ta of 1C over 25C. 3 Reduced by 3.0mW for each increase in Ta of 1C over 25C. Recommended operating conditions (Ta=25C) Parameter Power supply voltage Input voltage WRITE READ VIN Symbol VCC Min. 2.7 2.7 0 Typ. - - - Max. 5.5 5.5 VCC Unit V V V Memory ICs Electrical characteristics BR9080 / BR9080F / BR9080RFV / BR9016 / BR9016F / BR9016RFV BR9080 / F / RFV, BR9016 / F / RFV: 5V (Unless otherwise noted, Ta=-4085C, VCC=2.7V5.5V) Parameter Input low level voltage 1 Input high level voltage 1 Input low level voltage 2 Input high level voltage 2 Output low level voltage Output high level voltage Input leak current Output leak current Consumption current during operation Standby current SK frequency Symbol VIL1 VIH1 VIL2 VIH2 VOL VOH ILI ILO ICC1 ICC2 ISB fSK Min. - 0.7xVCC - 0.8xVCC 0 VCC-0.4 -1 -1 - - - - Typ. - - - - - - - - - - - - Max. 0.3xVCC - 0.2xVCC - 0.4 VCC 1 1 5 3 3 2 Unit V V V V V V A A mA mA A MHz DI pin DI pin CS, SK, WC pin CS, SK, WC pin IOL=2.1mA IOH=-0.4mA VIN=0VVCC VOUT=0VVCC, CS=VCC fSK=2MHz tE / W=10ms (WRITE) fSK=2MHz (READ) CS / SK / DI / WC=VCC DO, R / B=OPEN - Conditions BR9080 / F / RFV, BR9016 / F / RFV: 3V (Unless otherwise noted, Ta=-4085C, VCC=2.7V5.5V) Parameter Input low level voltage 1 Input high level voltage 1 Input low level voltage 2 Input high level voltage 2 Output low level voltage Output high level voltage Input leak current Output leak current Consumption current during operation Standby current SK frequency Symbol VIL1 VIH1 VIL2 VIH2 VOL VOH ILI ILO ICC1 ICC2 ISB fSK Min. - 0.7xVCC - 0.8xVCC 0 VCC-0.4 -1 -1 - - - - Typ. - - - - - - - - - - - - Max. 0.3xVCC - 0.2xVCC - 0.4 VCC 1 1 3 750 2 2 Unit V V V V V V A A mA A A MHz DI pin DI pin CS, SK, WC pin CS, SK, WC pin IOL=100A IOH=-100A VIN=0VVCC VOUT=0VVCC, CS=VCC fSK=2MHz tE / W=10ms (WRITE) fSK=2MHz (READ) CS / SK / DI / WC=VCC DO, R / B=OPEN - Conditions Not designed for radiation resistance Memory ICs BR9080 / BR9080F / BR9080RFV / BR9016 / BR9016F / BR9016RFV Operating timing characteristics BR9080 / F / RFV, BR9016 / F / RFV (Unless otherwise noted, Ta=-4085C, VCC=2.7V5.5V) Parameter CS setup time CS hold time Data setup time Data hold time DO rise delay time DO fall delay time Self-timing programming cycle CS minimum high level time READY / BUSY display valid time Symbol fCSS tCSH tDIS tDIH tPD1 tPD0 tE / W tCS tSV tOH tWH tWL tWCS tWCH Min. 100 100 100 100 - - - 250 - 0 250 250 0 0 Typ. - - - - - - - - - - - - - - Max. - - - - 150 150 10 - 150 150 - - - - Unit ns ns ns ns ns ns ms ns ns ns ns ns ns ms Time when DO goes HIGH-Z (via CS) Data clock high level time Data clock low level time Write control setup time Write control hold time Timing chart Synchronous Data Input Output Timing CS tCS tWH tCSS tCSH tDIH SK tWL tDIS DI tPD DO tPD tOH WC Fig.2 * Input data are clocked in to DI at the rising edge of the clock (SK). * Output data will toggle on the falling edge of the SK clock. * The WC pin does not have any effect on the READ, EWEN and EWDS operations. Memory ICs Circuit operation (1) Command mode BR9080 Instruction Read (READ) Write (WRITE) BR9080 / BR9080F / BR9080RFV / BR9016 / BR9016F / BR9016RFV Start Bit 1010 1010 1010 1010 Op Code 100 A0 010 A0 0011 0000 Address A1 A2 A3 A4 A5 A6 A7 A8 A1 A2 A3 A4 A5 A6 A7 A8 Data D0 D1 - D14 D15 Erase / Write enable (EWEN) Erase / Write disable (EWDS) : Means either VIH or VIL Address and data are transferred from LSB. BR9016 Instruction Read (READ) Write (WRITE) Start Bit 1010 1010 1010 1010 Op Code 10 A0 A1 01 A0 A1 0011 0000 Address A2 A3 A4 A5 A6 A7 A8 A9 A2 A3 A4 A5 A6 A7 A8 A9 Data D0 D1 - D14 D15 Erase / Write enable (EWEN) Erase / Write disable (EWDS) : Means either VIH or VIL Address and data are transferred from LSB. (2) Writing enabled / disabled H SK L H 1 4 8 ENABLE = 11 DISABLE = 00 12 16 CS L H DI L 1 0 1 0 0 0 HIGH-Z DO H R/B WC High or LOW Fig.3 1) When CS is "HIGH" during power up, BR9080 / F / RFV, BR9016 / F / RFV comes up in the erase / write disabled (EWDS) state. In order to be programmable, it must receive an enable (EWEN) instruction. The device remains programmable until a disable (EWDS) instruction is entered, or until it is powered down. 2) It is unnecessary to add the clock after 16th clock. Memory ICs (3) Read cycle BR9080 / F / RFV SK H 1 L 4 8 BR9080 / BR9080F / BR9080RFV / BR9016 / BR9016F / BR9016RFV 16 32 48 tCS H CS L H STANDBY 1 L HIGH-Z HIGH-Z D0 H D15 D0 D15 tOH Read Data (n) High or LOW Read Data (n+1) 0 1 0 1 0 0 A0 A1 A7 A8 DI DO R/B WC Fig.4 BR9080 / F / RFV BR9016 / F / RFV SK H 1 L tCS H 4 8 16 32 48 CS L H STANDBY 1 L HIGH-Z HIGH-Z D0 H D15 D0 D15 tOH Read Data (n) High or LOW Read Data (n+1) 0 1 0 1 0 A0 A1 A2 A8 A9 DI DO R/B WC Fig.5 BR9016 / F / RFV 1) After the fall of the 16th clock pulse, 16-bit data is output from the DO pin in synchronization with the falling edge of the SK signal. (DO output changes at a time lag of tPD0, tPD1 because of internal circuit delay following the falling edge of the SK signal. During the tPD0 and tPD1 timing, the tPD time should be assured before data is read, to avoid the previous data being lost. See the synchronized data input / output timing chart in Fig.2.) 2) Memory ICs (4) Write cycle BR9080 / F / RFV SK H 1 L H 4 8 BR9080 / BR9080F / BR9080RFV / BR9016 / BR9016F / BR9016RFV 16 32 CS L H tCS 1 L HIGH-Z HIGH-Z tSV H tE-W 0 1 0 0 1 0 A0 A1 A7 A8 D0 D15 DI DO R/B WC tWCS tWCH Fig.6 BR9080 / F / RFV BR9016 / F / RFV SK H 1 L H 4 8 16 32 CS L H tCS 1 L HIGH-Z HIGH-Z tSV H tE-W 0 1 0 0 1 A0 A1 A2 A8 A9 D0 D15 DI DO R/B WC tWCS tWCH Fig.7 BR9016 / F / RFV 1) At the rising edge of 32nd clock, R / B pin will be come out "LOW" after the specified time delay (tSV). 2) From above edge R / B will indicate the ready / busy status of the chip: "LOW" indicated programming is all in progress: "HIGH" indicates the write cycle is complete and this part is ready for another instruction. 3) During the input of Write command, CS must be "LOW". However, once the write operation started, CS could be either "HIGH" or "LOW". 4) If WC becomes "HIGH" during Write Cycle, the write operation is halted. In this case, the address data in writing is no guaranteed. It is necessary to rewrite it. Memory ICs BR9080 / BR9080F / BR9080RFV / BR9016 / BR9016F / BR9016RFV (5) READY / BUSY display (R / B pin and DO pin: BR9080 / F / RFV, BR9016 / F / RFV) 1) This display outputs the internal status signal; the R / B pin outputs the HIGH or LOW status at all times. The display can also be output from the DO pin. Following completion of the writing command, if CS falls while SK is LOW, either HIGH or LOW is output. (The display can also be output without using the R / B pin, leaving it open.) 2) When writing data to a memory cell, the READY / BUSY display is output from the rise of the 32nd clock pulse of the SK signal after tSV, from the R / B pin. R / B display = LOW: writing in progress (The internal timer circuit is activated, and after the tE / W timing has been created, the timer circuit stops automatically. Writing of data to the memory cell is done during the tE / W timing, during which time other commands cannot be received.) R / B display = HIGH: command standby state (Writing of data to the memory cell has been completed and the next command can be received.) SK CS Clock DI Write command tPD HIGH-Z DO BUSY READY tOZ HIGH-Z R/B READY BUSY READY Fig.8 R / B Status Output timing chart 1) D0 will output R / B status after CS is held low during SK=L, until CS is held high. Note : The document may be strategic technical data subject to COCOM regulations. Memory ICs BR9080 / BR9080F / BR9080RFV / BR9016 / BR9016F / BR9016RFV Operation notes (1) Turning the power supply on and off 1) When the power supply is turned on and off, CS should be set to HIGH (=VCC). 2) When CS is LOW, the command input reception state (active) is entered. If the power supply is turned on in this state, erroneous operations and erroneous writing can occur because of noise and other factors. To avoid this, make sure CS is set to HIGH (=VCC) before turning on the power supply. (Good example) Here, the CS pin is pulled up to VCC. When turning off the power supply, wait at least 10msec before turning it on again. Failing to observe this condition can result in the internal circuit failing to be reset when the power supply is turned on. (Bad example) CS is LOW when the power supply is turned on or off. In this case, because CS remains LOW, the EEPROM may perform erroneous operations or write erroneous data because of noise or other factors. * Please be aware that the case shown in this example can also occur if CS input is HIGH-Z. VCC VCC GND VCC CS GND Good example Bad example Fig.9 (2) Noise countermeasures 1) SK noise If noise occurs at the rise of the SK clock input, the clock is assumed to be excessive, and this can cause malfunction because the bits are out of alignment. 2) WC noise During a writing operation, noise at the WC pin can be erroneously judged to be data, and this can cause writing to be forcibly interrupted. 3) VCC noise Noise and surges on the power supply line can cause malfunction. We recommend installing a bypass capacitor between the power supply and ground to eliminate this problem. Memory ICs (3) Canceling modes 1) Read commands BR9080 / BR9080F / BR9080RFV / BR9016 / BR9016F / BR9016RFV SK 32 Clock CS DI Start bit 4 bits Operating code 4 bits Address 8 bits 16 bits DO DO Data D15 Cancel can be performed for the entire read mode space WC HIGH or LOW Fig.10 Cancellation method: CS HIGH 2) Write commands SK 32 Clock CS DI Start bit 4 bits Operating code 4 bits Address 8 bits DO Data 16 bits D15 tE / W R/B a b c d WC Fig.11 Canceling methods a : Canceled by setting CS HIGH. The WC pin is not involved. b : If the WC pin goes HIGH for even a second, writing is forcibly interrupted. Cancellation occurs even if the CS pin is HIGH. At this point, data has not been written to the memory, so the data in the designated address has not yet been changed. c : The operation is forcibly canceled by setting the WC pin to HIGH or turning off the power supply (although we do not recommend using this method). The data in the designated address is not guaranteed and should be written once again. d : If CS is set to HIGH while the R / B signal is HIGH (following the tE / W timing), the IC is reset internally, and waits for the next command to be input. Memory ICs External dimension (Units : mm) BR9080 BR9016 9.3 0.3 BR9080 / BR9080F / BR9080RFV / BR9016 / BR9016F / BR9016RFV BR9080F BR9016F 5.0 0.2 8 5 6.5 0.3 8 5 6.2 0.3 4.4 0.2 1 4 7.62 1 4 0.51Min. 1.5 0.1 0.11 3.2 0.2 3.4 0.3 1.27 0.4 0.1 0.3Min. 0.15 0.3 0.1 2.54 0.5 0.1 0 ~ 15 DIP8 SOP8 BR9080RFV BR9016RFV 3.0 0.2 8 5 6.4 0.3 4.4 0.2 1 4 0.22 0.1 0.1 1.15 0.1 (0.52) 0.65 0.3Min. 0.1 SSOP-B8 0.15 0.1 0.15 0.1 |
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